L-3.11 Direct Mapping in Cache Memory | Cache Mapping | Memory Organisation |COA | CSA |Shanu Kuttan
HTML-код
- Опубликовано: 6 сен 2024
- #DirectMapping #CacheMapping #ComputerArchitecture #ShanuKuttanCSEClasses
Welcome to this youtube channel "Shanu Kuttan CSE Classes " by Shanu Kuttan
This is a technical educational channel for subjects of computer science and engineering subjects (CSE) as per university syllabus and also cover the Syllabus GATE Computer Science (GATE CS) and NTA UGC NET Computer Science (NTA UGC NET CS) topics and questions. It provides Computer Science and engineering classes in Hindi. This channel’s video helps Computer Science and Engineering students to understand Computer System Architecture (CSA) i.e. Computer Organization and Architecture (COA) or simply Computer Architecture in easy way. This video discussed the topic from Memory Organisation unit or The Memory System unit as per the CSVTU syllabus i.e. Chhattisgarh Swami Vivekanand Technical University, Bhilai.
This video explains one of the simplest Cache Mapping Technique a Direct Mapping Techniques in Cache Memory. Direct Mapping with example is explained along with CPU address format in Main memory and cache memory with index, tag, block and word fields in address.
Cache Mapping Types or Cache Mapping Techniques or Cache Mapping Schemes
Types of mapping process: Direct Mapping, Associative Mapping, Set Associative Mapping
For other Topics follow the given link of this channel:
Memory Hierarchy • L-3.1 Memory Hierarchy...
Main Memory, internal structure & its Types: • L-3.2 Main Memory | In...
SRAM v/s DRAM: • L-3.3 Static RAM vs D...
RAM & ROM Chips: • L-3.4 RAM & ROM Chips ...
Associative Memory • L-3.5 Associative Memo...
Locality of Reference in Cache Memory • L-3.6 Locality of Refe...
Cache Memory, Hit Ratio , Miss Penalty, Avg. Access Time:
• L-3.7 Cache Memory | H...
Levels of Cache Memory: • L-3.8 Levels of Cache ...
Cache Mapping: • L-3.9 What is Cache Ma...
Associative Mapping: • L-3.10 Associative Map...
Direct Mapping: • L-3.11 Direct Mapping ...
Set Associative Mapping: • L-3.12 Set Associative...
Cache Mapping Solved Questions: • L-3.13 Cache Mapping S...
Virtual Memory & Paging: • L-3.14 Virtual Memory ...
Page Replacement Algorithms: • L-3.15 Page Replacemen...
FIFO Page Replacement Algorithm: • L-3.16 FIFO Page Repla...
LRU Page Replacement Algorithm: • L-3.17 LRU Page Replac...
OPT or Optimal Page Replacement Algorithm: • L-3.18 Optimal OPT Pag...
Memory Interleaving: • L-3.19 Memory Interlea...
High order Memory Interleaving: • L-3.20 High Order Memo...
Low order Memory Interleaving: • L-3.21 Low Order Memor...
Contact Link in Facebook :
/ shanukuttan.cseclasses
beautiful lecture by beautiful teacher ❤
thanks mam for the lectures
Best teacher ever..❣️
My time doesn't wasted after watching your video mam.
Best content with to the point explanation. From today I'm your permanent subscriber ma'am....
😄
Why we use octal address?
Because if we use binary address then it's representation is complex as it is represented in 0/1bits only.
Mam please explain how you wrote octal address at 5:42 ... tommorow is my exam
Converted binary address into octal
Life saver!
Even if we divide the cache in several blocks, the CPU still needs to go to the main memory to get a word having same index but different tag. Doesn't it?
Thank you so much ma'am...
Thankqu ma'am❤
Maam please subscribe your student's channel....
Very nice explanation
Very nice 👍👍👍👍👍
thnx
Thank u mam
👍👍👍
mam can we get a pdf?
Ty mam 🙂
nice mam. thanks
Can you please explain how you have converted the bits into octal
You means binary to octal
mam please please upload pdf of notes
Mam PDF mil sakata h kya???
Aa for now u can take screenshots
Kuch samajh nahi aaya mere ko
koi baat nhu