Timing Diagram for an Asynchronous D Flip Flop

via RUclips Capture

[@Outbreakify]

This was amazing, you didn't leave anything unexplained. Thank you.

[@Zeddy27182]

I have an Exam tomorrow. Now, it is crystal clear!
Thank you for your clear explanation!

[@MandyTCTC]

Glad it helped!

[@Zeddy27182]

@@MandyTCTC I got that right!! Hats off to you🙏

[@La0zxSh0rti3]

you just saved my life! I could not figure this out for so long. but your explanation helped me so much! thank you!

[@4th7throyaldragoonguards53]

Why can't teachers be as clear and concise as this lady?

[@rothenbergt]

Exactly what I needed thanks, Mandy!

[@fruitbowl32]

Super helpful and intuitive video! Thanks so much.

[@imullin07]

thank you, nobody explains how to draw these with preset and clear. one question can you do a problem that has those inputs on a jk flip flop. thank you so much

[@Gigifulcrum]

Thank you for this, cleared it up for me.

[@varun3944]

just amazing

[@makessense7095]

You're a good teacher. Thanks Mandy Elmore.

[@angelica534]

Thank you 🙏🏽

[@wdfguy]

Wow thanks mate!

[@kelvinwaweru2238]

Wow this is nice work... Thank you so much

[@nikafif2211]

thanks !

[@lebulle4544]

Great video

[@tareknagla3141]

EXCELLENT

[@MR.Jihad94]

Thnx a lot :D

[@happyxu416]

thanks so much : )

[@pulsal1138]

Really helpful video, thanks a lot

[@MandyTCTC]

Glad it was helpful!

[@htetnaingwin6100]

Thank you so much..

[@Jaya.M78]

Thanks a lot!!

[@adamjimenez978]

I love you thank you

[@dindasLife11]

Thx a lot :D :D

[@nicholasobrien8329]

Holy god if my professor had just shown this video in class......

[@balpreetkaur8763]

thank you so much mam.

[@vincent2559]

Holy Fuck! Thanks. Simple as shit.

[@funtrollersmitty9672]

appears timing period for preset and clear in shorter length than clock .

[@giorgos3747]

how do i connect the wires if i want to create a 3bit asychronous counter?

[@anyi5077]

How was the waveform generated please?

[@apoorvanand2778]

Nyc Vooice

[@hasifsalam8067]

If Q follows D when PR & CLR are high. Why didnt the Q go down during halfway. In the early column

[@shivanibhardwaj9082]

hasif salam yes I also felt the same

[@lastridelimitz]

Q follows D at every rising edge of the Clock, not halfway. It only pays attention to D when the Clock is at a rising edge, after that it assumes the same value until the next rising edge at Clock. Hope that makes sense.

[@oluwademilademustapha3637]

Hi what about if it was synchronous?

[@incharawalvekar3977]

Master slave SR waveform

[@gkiran931]

can we design a logic circuit using timing diagram??

[@MandyTCTC]

Yes. Do you have one you want done?

[@ademcapan4831]

this is not an asynchronous circuit because Q change according to clock isn't it?