Hi, Is it possible to trigger interrupts irq within the NMI handler or HardFault handler? Do we need to write or alter any core registers to achieve this since these exceptions have higher priority than irq?
@@gaganpreet98 you know mam I was really in trouble with this concept and within a week i have exam... Suddenly I thought let's search then I got your video... Thanks alot❤️
Hi, Is it possible to trigger interrupts irq within the NMI handler or HardFault handler? Do we need to write or alter any core registers to achieve this since these exceptions have higher priority than irq?
Very clear explanation, Thanks a lot.
Hi, Is it possible to trigger interrupts irq within the NMI handler or HardFault handler? Do we need to write or alter any core registers to achieve this since these exceptions have higher priority than irq?
Can you make a video on application of this .. possibly using imxrt1062 … I am facing trouble in setting up ISR for PWM counter overflow interrupt
Nice work
good job .Thank you
madam, i hope when you mention ARM7 it means ARMv-7A architecture.
Yes
It was really helpful mam, nice illustration ☺️
Thank u so much
@@gaganpreet98 you know mam I was really in trouble with this concept and within a week i have exam... Suddenly I thought let's search then I got your video... Thanks alot❤️
God bless u and all the best for ur exams
Hi, Is it possible to trigger interrupts irq within the NMI handler or HardFault handler? Do we need to write or alter any core registers to achieve this since these exceptions have higher priority than irq?