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17:52 How are the C1 and C2 determined for each integrator?

thank you for the course. would you please upload lecture 4?

This is one of the best explanation videos I've seen. It's not just easy to understand what this circuit does, it's also easy to understand how you reason and derive your conclusions. And this is also how actual engineers do their work: by deriving concepts from first principles with assumptions, and then going full in. Pure engineering excellence.

@ 9:13 why first zero crossing advances and 2nd delays? Is it due to sign of sin waveform at pi/2 and 3*pi/2 ?

👌

The explanation of the approximation were very clear and detail!

Very clear explanation on the fundation of constatn current bias circuit. Excellent!

I have been searching for Zout explanation and this is very quite simple and easy explanation of Zout. you have very good teaching skill. 👋

13：50 🎉

Sir if possible pls attach the notes . It will be much helpful for this course, to revisit the graphs and to analyze them.

Absolutely Insane

Well taught

Thanks for explaining.

Thank you!

do the replicas have amplitude? does it mean sampling a finite power signal results in infinite power signal because of replicas?

clear as mud to students :)

you obey nyquist because he is a smart guy ?? so, you are asking your students to obey you? did you study in India or outside? looks like india

you missed to explain what exactly replicas mean. when students are getting so much confused even after 45mins into lecture you have to question yourself: am I am failing to explain properly

Prof. Ashwin, could you please have a lecture on chopper amplifier and compare with cds? Your lectures are awesome ❤

Obvious question is does it alias back with same magnitude or different magnitudes depending on whether frequency is at fs or 2*fs or 3*fs

For any input frequency add or subtract +/- n*fs; If the result falls within band of interest then you have aliasing; That's how you calculate aliased frequency. Intuition and practical interpretations are not well explained. He can do better. It's simple concept if well explained.

clearly he has more intuition than what he is teaching but doesn't want to explain properly - classic Indian jealousy that destroyed knowledge transfer.

@50:33 for -ve SR there should also be -ve fb at M2

what text book is used in this course

nice !

Amazing

sorry there is no lecture 2?

so great!

Sir, can you please tell me why you use differential structure in SAR ADC? Why not single-ended? And what is the problem if we design for single-ended?

Thank you sir for your explanations could you please provide me with the Matlab code you used to implement the digital filter you used in the example

Excellent

Great work ❤❤

Can anyone tell why we did this calculations in Z domain? why not in frequency domain or other? please elaborate....I cant understand? what are the benefits of doing cal. in such a way??

Inverter is a disputed property...😹

Please upload DAC videos also... this is very good lecture series

Really like the way you teaching .. usually we feel sleepy while watching NPTEL videos but this is great

Simple and great explainantion

How do you know the current required in the network you want to bias (like the 1mA in your example)

Can you upload lecture 2,3 please?

can someone clearly explain me the other pmos switch attached at source of n mos Vp and Vq

Alfred Ford

what is the name of the professor?

20:45

will single inverter followed by RC work as oscillator..?

Nice lecture

Super lecture

Awesome Lecture Series✌

Greetings Professor. At 36:37 the pMOS has little to no Vsd. Vy (Drain of pMOS) is at VDD (almost) and Source of pMOS is also at VDD, that should yield a Vsd ≈ 0 V. Shouldn't that make the current ≈ 0? Even with the Vsg ≈ VDD, Source and Drain are almost shorted and no current should flow. But, how are you saying that it will conduct current? Can you clarify this?

Hello sir…. Please upload 2024 notes

Most hopeless lecture in the series so far.