Debarshi Chatterjee
Debarshi Chatterjee
  • Видео 10
  • Просмотров 10 690

Видео

Sudoku (using System Verilog Constraint) - Interview Question for Apple/Google etcSudoku (using System Verilog Constraint) - Interview Question for Apple/Google etc
Sudoku (using System Verilog Constraint) - Interview Question for Apple/Google etc
Просмотров 4,9 тыс.Год назад
System Verilog Constraint Interview Question
GraphCov: RTL Graph Based Test Biasing for Exploring Uncharted Coverage Landscape.pdfGraphCov: RTL Graph Based Test Biasing for Exploring Uncharted Coverage Landscape.pdf
GraphCov: RTL Graph Based Test Biasing for Exploring Uncharted Coverage Landscape.pdf
Просмотров 206Год назад
Automated Coverage Closure
FIFO Topology Aware Stalling for Accelerating Coverage ConvergenceFIFO Topology Aware Stalling for Accelerating Coverage Convergence
FIFO Topology Aware Stalling for Accelerating Coverage Convergence
Просмотров 922 года назад
Systematic Constraint Relaxation (SCR): Hunting for Over-Constrained StimulusSystematic Constraint Relaxation (SCR): Hunting for Over-Constrained Stimulus
Systematic Constraint Relaxation (SCR): Hunting for Over-Constrained Stimulus
Просмотров 2692 года назад
A heuristic for automatically identifying over-constraints in a System Verilog test bench
BatchSolve: A Divide and Conquer Approach to Solving the Memory Ordering Problem, DVCON 2022BatchSolve: A Divide and Conquer Approach to Solving the Memory Ordering Problem, DVCON 2022
BatchSolve: A Divide and Conquer Approach to Solving the Memory Ordering Problem, DVCON 2022
Просмотров 4172 года назад
An approach to easily verify memory ordering rules at integration level Test Benches without the high overhead of transaction tracking
Deep Stalling using a Coverage Driven Genetic Algorithm FrameworkDeep Stalling using a Coverage Driven Genetic Algorithm Framework
Deep Stalling using a Coverage Driven Genetic Algorithm Framework
Просмотров 1133 года назад
Application of Deep Learning to FIFO Stalling
Solving NxN Tic-Tac-Toe using System Verilog Constraints (Interview Question!)Solving NxN Tic-Tac-Toe using System Verilog Constraints (Interview Question!)
Solving NxN Tic-Tac-Toe using System Verilog Constraints (Interview Question!)
Просмотров 3,1 тыс.3 года назад
This is a generalization of the 3x3 tic-tac-toe problem. Providing a SV constraint based solution for the general case. Code: drive.google.com/file/d/1nGD8VffIPE_GktUOVO4hmrqfUjOh-aBi/view?usp=sharing
FIFO VC Dependency Graph and Its Application to System Level Deadlock Verification #DVCON_US 2021FIFO VC Dependency Graph and Its Application to System Level Deadlock Verification #DVCON_US 2021
FIFO VC Dependency Graph and Its Application to System Level Deadlock Verification #DVCON_US 2021
Просмотров 3293 года назад
Presenting a graph-based hardware deadlock detection technique that can be applied at unit, integration as well as system level. Paper (PDF): drive.google.com/file/d/10cMDUmG6SQetDEOSnKE71RYW0rv5d5i3/view?usp=sharing Slides (PDF): drive.google.com/file/d/1Cz1SM5jHmbnHaV0XJpdq3Ma7kaRrceEF/view?usp=sharing

Комментарии

  • @I_Luv_Alwar
    @I_Luv_Alwar Месяц назад

    Sir, I have one question -> is above operator is valid in system verilog constraint?

  • @ManalShah2907
    @ManalShah2907 7 месяцев назад

    Do you mind putting the link to the EDA-playground?

  • @reubenthomas5387
    @reubenthomas5387 9 месяцев назад

    How is 2,2 in the equation gives 0

  • @sabarish862
    @sabarish862 10 месяцев назад

    In last constraint, Multuplication by 3 is immaterial, isnt it!

  • @RenatoPeralta
    @RenatoPeralta Год назад

    Great video!

  • @darshasher2596
    @darshasher2596 Год назад

    Really loved this video. It was very concise and precisely explained. If possible can you please upload the eda playground solution link ?

  • @srini.....
    @srini..... Год назад

    please upload more videos sir