- Видео 242
- Просмотров 224 586
Algorithms to Architecture, ECE, IIIT Delhi
Индия
Добавлен 18 апр 2020
Lab: Algorithms to Architecture
Department: ECE
University: IIIT Delhi
Director: Dr. Sumit J Darak
Research Area: Reconfigurable and Intelligent Architectures for AI, Reconfigurable and Intelligent PHY, Algorithms to Architecture Mapping
Department: ECE
University: IIIT Delhi
Director: Dr. Sumit J Darak
Research Area: Reconfigurable and Intelligent Architectures for AI, Reconfigurable and Intelligent PHY, Algorithms to Architecture Mapping
Best Demo Award at COMSNETs 2025: RFSoC-Based Testbed for Over-the-Air Wireless Transceiver at mmW
Best Demo Award at COMSNETs 2025! Excellent work done by Jeet Tekchandani (Master Student, IIIT Delhi) and Jai Mangal (PhD Student, IIIT Delhi) at Algorithms to Architecture, IIIT Delhi.
Summary: The millimeter wave (mmW) frequency spectrum has been explored recently for large bandwidth communication. At these frequencies, narrow directional beams are required for communication since the signal attenuation is high due to atmospheric absorption. This work presents an AMD RFSoC and Sivers Semiconductors analog front-end-based hardware testbed capable of directional communication via analog beamforming at mmW. The proposed testbed comprises orthogonal frequency division multiplexing (OFDM) b...
Summary: The millimeter wave (mmW) frequency spectrum has been explored recently for large bandwidth communication. At these frequencies, narrow directional beams are required for communication since the signal attenuation is high due to atmospheric absorption. This work presents an AMD RFSoC and Sivers Semiconductors analog front-end-based hardware testbed capable of directional communication via analog beamforming at mmW. The proposed testbed comprises orthogonal frequency division multiplexing (OFDM) b...
Просмотров: 178
Видео
IIITD AELD Lab14: Fixed-point AXI Compatible FFT using high level synthesis (HLS)
Просмотров 209Месяц назад
IIITD AELD Lab14: Fixed-point AXI Compatible FFT using high-level synthesis (HLS) Student: Aakanksha Tewari, PhD Student IIIT Delhi Instructor: Dr. Sumit J Darak, Associate Professor, IIIT Delhi (faculty.iiitd.ac.in/~sumit/) Complete Playlist: ruclips.net/p/PL579fbjB-a0uQu2tQ5uBj7kKAPMNRE8ta
4/4_Deep Learning Aided Wireless Channel Estimation on Zynq SoC via Dynamic Partial Reconfiguration
Просмотров 1314 месяца назад
In this tutorial, we demonstrate the design of deep learning aided wireless channel estimation on Zynq SoC and discuss the reconfigurable architecture via dynamic partial reconfiguration (DPR) flow. This work is done by Syed Asrar Ul Haq (PhD Student, IIIT Delhi). For more details, please contact: syedh@iiitd.ac.in Paper: S. A. Ul Haq, S. J. Darak and A. K. Gizzini, "Low Complexity Deep Learnin...
2/4_Deep Learning Aided Wireless Channel Estimation on Zynq SoC via Dynamic Partial Reconfiguration
Просмотров 1764 месяца назад
In this tutorial, we demonstrate the design of deep learning aided wireless channel estimation on Zynq SoC and discuss the reconfigurable architecture via dynamic partial reconfiguration (DPR) flow. This work is done by Syed Asrar Ul Haq (PhD Student, IIIT Delhi). For more details, please contact: syedh@iiitd.ac.in Paper: S. A. Ul Haq, S. J. Darak and A. K. Gizzini, "Low Complexity Deep Learnin...
3/4_Deep Learning Aided Wireless Channel Estimation on Zynq SoC via Dynamic Partial Reconfiguration
Просмотров 684 месяца назад
In this tutorial, we demonstrate the design of deep learning aided wireless channel estimation on Zynq SoC and discuss the reconfigurable architecture via dynamic partial reconfiguration (DPR) flow. This work is done by Syed Asrar Ul Haq (PhD Student, IIIT Delhi). For more details, please contact: syedh@iiitd.ac.in Paper: S. A. Ul Haq, S. J. Darak and A. K. Gizzini, "Low Complexity Deep Learnin...
1/4_Deep Learning Aided Wireless Channel Estimation on Zynq SoC via Dynamic Partial Reconfiguration
Просмотров 1614 месяца назад
In this tutorial, we demonstrate the design of deep learning aided wireless channel estimation on Zynq SoC and discuss the reconfigurable architecture via dynamic partial reconfiguration (DPR) flow. This work is done by Syed Asrar Ul Haq (PhD Student, IIIT Delhi). For more details, please contact: syedh@iiitd.ac.in Paper: S. A. Ul Haq, S. J. Darak and A. K. Gizzini, "Low Complexity Deep Learnin...
Qualcomm Innovation Fellowship Winner: IEEE 802.11ad Based Integrated Sensing and Comm. (ISAC)
Просмотров 1494 месяца назад
This work was done by Akanksha Sneh and Aakansha Tewari, PhD Students, at IIIT Delhi under the guidance of Dr. Shobha Sundar Ram and Dr. Sumit Darak. Please refer to the papers below for more details Papers: A. Sneh, S. Jain, V. Sindhu, S. S. Ram and S. J. Darak, “IEEE 802.11ad Based Joint Radar Communication Transceiver: Design, Prototype and Performance Analysis,” in IEEE Transactions on Vehi...
10/10_RFSoC4x2_Reference Example with HLS and PYNQ
Просмотров 1304 месяца назад
In this playlist, we explain the step-by-step process to develop reference examples for sinewave transmission over two DAC and DAC chains using Vivado HLS and PYNQ tools. This work is done by Riya Sachdeva (riya22411@iiitd.ac.in), BTech 3rd Year, ECE Student, IIIT Delhi, as part of the Summer 2024 Semester under the guidance of Aakanksha Tewari (PhD Student, IIIT Delhi) and Dr. Sumit Darak (Fac...
9/10_RFSoC4x2_Reference Example with HLS and PYNQ
Просмотров 924 месяца назад
In this playlist, we explain the step-by-step process to develop reference examples for sinewave transmission over two DAC and DAC chains using Vivado HLS and PYNQ tools. This work is done by Riya Sachdeva (riya22411@iiitd.ac.in), BTech 3rd Year, ECE Student, IIIT Delhi, as part of the Summer 2024 Semester under the guidance of Aakanksha Tewari (PhD Student, IIIT Delhi) and Dr. Sumit Darak (Fac...
8/10_RFSoC4x2_Reference Example with HLS and PYNQ
Просмотров 1194 месяца назад
In this playlist, we explain the step-by-step process to develop reference examples for sinewave transmission over two DAC and DAC chains using Vivado HLS and PYNQ tools. This work is done by Riya Sachdeva (riya22411@iiitd.ac.in), BTech 3rd Year, ECE Student, IIIT Delhi, as part of the Summer 2024 Semester under the guidance of Aakanksha Tewari (PhD Student, IIIT Delhi) and Dr. Sumit Darak (Fac...
7/10_RFSoC4x2_Reference Example with HLS and PYNQ
Просмотров 1154 месяца назад
In this playlist, we explain the step-by-step process to develop reference examples for sinewave transmission over two DAC and DAC chains using Vivado HLS and PYNQ tools. This work is done by Riya Sachdeva (riya22411@iiitd.ac.in), BTech 3rd Year, ECE Student, IIIT Delhi, as part of the Summer 2024 Semester under the guidance of Aakanksha Tewari (PhD Student, IIIT Delhi) and Dr. Sumit Darak (Fac...
6/10_RFSoC4x2_Reference Example with HLS and PYNQ
Просмотров 1974 месяца назад
In this playlist, we explain the step-by-step process to develop reference examples for sinewave transmission over two DAC and DAC chains using Vivado HLS and PYNQ tools. This work is done by Riya Sachdeva (riya22411@iiitd.ac.in), BTech 3rd Year, ECE Student, IIIT Delhi, as part of the Summer 2024 Semester under the guidance of Aakanksha Tewari (PhD Student, IIIT Delhi) and Dr. Sumit Darak (Fac...
5/10_RFSoC4x2_Reference Example with HLS and PYNQ
Просмотров 984 месяца назад
In this playlist, we explain the step-by-step process to develop reference examples for sinewave transmission over two DAC and DAC chains using Vivado HLS and PYNQ tools. This work is done by Riya Sachdeva (riya22411@iiitd.ac.in), BTech 3rd Year, ECE Student, IIIT Delhi, as part of the Summer 2024 Semester under the guidance of Aakanksha Tewari (PhD Student, IIIT Delhi) and Dr. Sumit Darak (Fac...
4/10_RFSoC4x2_Reference Example with HLS and PYNQ
Просмотров 1164 месяца назад
In this playlist, we explain the step-by-step process to develop reference examples for sinewave transmission over two DAC and DAC chains using Vivado HLS and PYNQ tools. This work is done by Riya Sachdeva (riya22411@iiitd.ac.in), BTech 3rd Year, ECE Student, IIIT Delhi, as part of the Summer 2024 Semester under the guidance of Aakanksha Tewari (PhD Student, IIIT Delhi) and Dr. Sumit Darak (Fac...
3/10_RFSoC4x2_Reference Example with HLS and PYNQ
Просмотров 1104 месяца назад
In this playlist, we explain the step-by-step process to develop reference examples for sinewave transmission over two DAC and DAC chains using Vivado HLS and PYNQ tools. This work is done by Riya Sachdeva (riya22411@iiitd.ac.in), BTech 3rd Year, ECE Student, IIIT Delhi, as part of the Summer 2024 Semester under the guidance of Aakanksha Tewari (PhD Student, IIIT Delhi) and Dr. Sumit Darak (Fac...
2/10_RFSoC4x2_Reference Example with HLS and PYNQ
Просмотров 1734 месяца назад
2/10_RFSoC4x2_Reference Example with HLS and PYNQ
1/10_RFSoC4x2_Reference Example with HLS and PYNQ
Просмотров 5234 месяца назад
1/10_RFSoC4x2_Reference Example with HLS and PYNQ
Qualcomm Innovation Fellowship 2024 Super-Winner Entry: Deep Learning Augmented Channel Estimation
Просмотров 1075 месяцев назад
Qualcomm Innovation Fellowship 2024 Super-Winner Entry: Deep Learning Augmented Channel Estimation
Qualcomm Innovation Fellowship 2023 Winner: Deep Learning augmented Channel Estimation at Edge
Просмотров 1065 месяцев назад
Qualcomm Innovation Fellowship 2023 Winner: Deep Learning augmented Channel Estimation at Edge
P7_OFDM on RFSoC Using MATLAB without HDL Coder
Просмотров 2987 месяцев назад
P7_OFDM on RFSoC Using MATLAB without HDL Coder
P6_OFDM on RFSoC Using MATLAB without HDL Coder
Просмотров 707 месяцев назад
P6_OFDM on RFSoC Using MATLAB without HDL Coder
P5_OFDM on RFSoC Using MATLAB without HDL Coder
Просмотров 737 месяцев назад
P5_OFDM on RFSoC Using MATLAB without HDL Coder
P4_OFDM on RFSoC Using MATLAB without HDL Coder
Просмотров 537 месяцев назад
P4_OFDM on RFSoC Using MATLAB without HDL Coder
P3_OFDM on RFSoC Using MATLAB without HDL Coder
Просмотров 607 месяцев назад
P3_OFDM on RFSoC Using MATLAB without HDL Coder
P2_OFDM on RFSoC Using MATLAB without HDL Coder
Просмотров 747 месяцев назад
P2_OFDM on RFSoC Using MATLAB without HDL Coder
P1_OFDM on RFSoC Using MATLAB without HDL Coder
Просмотров 1587 месяцев назад
P1_OFDM on RFSoC Using MATLAB without HDL Coder
P6_RFSoC MATLAB Integration without HDL Coder
Просмотров 234Год назад
P6_RFSoC MATLAB Integration without HDL Coder
P5_RFSoC MATLAB Integration without HDL Coder
Просмотров 139Год назад
P5_RFSoC MATLAB Integration without HDL Coder
P4_RFSoC MATLAB Integration without HDL Coder
Просмотров 138Год назад
P4_RFSoC MATLAB Integration without HDL Coder
P2_RFSoC MATLAB Integration without HDL Coder
Просмотров 222Год назад
P2_RFSoC MATLAB Integration without HDL Coder
Congrats
Great tutorial, but how do I get the ac.h and ac.cpp files? What happened from 2:13 to 2:17?
I cant thank you enough for this playlist, it is exactly what I needed to learn. thank you
This video is absolute treasure, thank you
very informative
Thank you for your effort
Very useful thank you
Very informative, thank you
Easy to immlement and learn thank you
Very valuable for PYNQ. Thank you
Very smooth start forHLS. Thank you
It looks like a whole SoC course, Dr. Vipin is always a great source of FPGA knowledge. Thank you all
I was glad it represented by Dr. Kizheppatt Vipin, I always learn from him.
Best Video ever
Nice start even for DMA, thank you
Best FFT explnation I ever seen, also the code structure are very simple and easy to follow thank you.
it is a bit confusing when you used Real and Imag in two different arrays would be easier to follow with only one complex array
very valuable video
thank you for your effort
very important video thank you
nice video thank you
very interesting
Thank you for such nice video
Nice video thakn you
nice video thank you
Very detailed video thank you
I dont know, how could I miss such an amazing playlist and channel. Thank you for your time and effort
really informative video. thanks for the help :)
can someone get me the top wrapper code ? how did he get it ?
Great Video! The explanation was really clear and helpful. would it be possible for you to share the code used in the video? it wouid be super helpful for understanding the concept better. Thanks in advance!
Its really great course!! Thanks for sharing the knowledge with us. If possible can you please share the drive link of all ppt slides? It will will be very helpful. thanks
Nhi chal rah bhai
is there a link to the documents ? thanks for the videos !
i am using Vitis Unified IDE 2023.2,to know the execution time of code , there is no file such as "Xtime_l.h" in the application folder.and i can't build the FFT C program
then you have problem with the bsp, you are missing some driver try to build the vivado project correctly
can you provide the link to access handout materials discussed in the above lecture
Where i can find source code for this lab?
thank you so much, It helped a lot.
excuse me my simulation when reaches to 105 ns, stops and runs forever and I can not see the output data after 0 , I use vivado 2023, and for testbench my timing scale is 1 ns/ 1 ps. can you tell me what is the issue?
I am facing same issue, did you find any solution?