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BTECH LABS
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Добавлен 16 окт 2012
HOW TO CHECK OUTPUT OF 8BIT SUBTRACTION USING 8051 MICROCONTROLLER KIT
8 bit subtraction#ktu #polytech #8051 #btech
ruclips.net/video/WLQ1dA6TMG0/видео.htmlsi=j2tDDfjNuOBEFO2-
ruclips.net/video/WLQ1dA6TMG0/видео.htmlsi=j2tDDfjNuOBEFO2-
Просмотров: 27
Видео
8 BIT SUBTRACTION FOR TWO NUMBERS ALP PROGRAM# 8051 MICROCONTROLLER
Просмотров 17День назад
8 bit subtraction# 8051 micro conter #alp#ktu #ktu
16 bit additon using 8051 microcontroller kit part -3
Просмотров 64Месяц назад
#8051microcontroller #ktu#btech#polytech
16 BIT ADDITION OF TWO NUMBERS PART -2
Просмотров 85Месяц назад
#ktu #btech#polytechnic #16 bit addition#8051
16 BIT ADDITION OF TWO NUMBERS @8051 MICROCONTROLLER PART -1
Просмотров 60Месяц назад
16 bit addition #ktu #btech #polytech #8051
ALP FOR 8 BIT ADDITION OF TWO NUMBERS#8051 PART -2
Просмотров 283Месяц назад
ALP FOR 8 BIT ADDITION OF TWO NUMBERS#ktu #btech #polytechnics #8051
8 BIT ADDITION OF TWO NUMBERS PART-1
Просмотров 34Месяц назад
8 BIT ADDITION OF TWO NUMBERS #ktu #btech #polytechnic #microcontroller
8051 microcontroller kit working procedure &execution of ALP PART -3
Просмотров 2062 месяца назад
8051 microcontroller kit working procedure#ktu#polytechnic ruclips.net/video/-W7Z9PTccYw/видео.htmlsi=nvuXSHZ8MCPQl82D
patch antenna design using HFFS ansys software
Просмотров 1472 месяца назад
patch antenna design using HFFS ansys software
EXPERIMENT ON MOD 10 COUNTER(DECADE COUNTER)
Просмотров 5 тыс.5 месяцев назад
mod 10 counter or decade counter# lcd#btech #digitallogic #poly#lab #ktu
EXPERIMENT ON JK FLIP FLOP USING NAND GATE
Просмотров 2,7 тыс.5 месяцев назад
jk flipflop experiment#lab #btech #digitallogic #polytechnic#ktu#ece, eee, cse
EXPERIMENT ON REALISATION OF SOP EXPRESSIONS USING NAND GATE ONLY
Просмотров 1,8 тыс.6 месяцев назад
sop expression#btech #polytechnic #lab
IMPLEMENTATION OF BASIC GATES UNIVERSAL GATE
Просмотров 1,9 тыс.6 месяцев назад
IMPLEMENTATION OF BASIC GATES UNIVERSAL GATE
FOUR BIT BINARY UP COUNTER/ASYNCHRNOUS COUNTER
Просмотров 5 тыс.7 месяцев назад
FOUR BIT BINARY UP COUNTER/ASYNCHRNOUS COUNTER
full subtractor using basic gates
Просмотров 2,4 тыс.7 месяцев назад
full subtractor using basic gates
LAB EXPERIMENT ON SHIFT REGISTER USING D FLIP FLOPS#BTECH/POLYTECHNIC
Просмотров 2,1 тыс.8 месяцев назад
LAB EXPERIMENT ON SHIFT REGISTER USING D FLIP FLOPS#BTECH/POLYTECHNIC
Lab Experiment on full adder using basic gates design and implementation#btech #polytechnic
Просмотров 2,5 тыс.8 месяцев назад
Lab Experiment on full adder using basic gates design and implementation#btech #polytechnic
EXPERIMENT ON RING COUNTER USING FLIP FLOPS#btech #polytechnic #lab
Просмотров 10 тыс.11 месяцев назад
EXPERIMENT ON RING COUNTER USING FLIP FLOPS#btech #polytechnic #lab
EXPERIMENT ON HALF ADDER USING NAND GATE ONLY#btech #polytechnic #ktu#lab
Просмотров 4,6 тыс.11 месяцев назад
EXPERIMENT ON HALF ADDER USING NAND GATE ONLY#btech #polytechnic #ktu#lab
EXPERIMENT ON 1:4 DEMULTIPLEXER USING GATES#btech #lab #polytechnic
Просмотров 7 тыс.11 месяцев назад
EXPERIMENT ON 1:4 DEMULTIPLEXER USING GATES#btech #lab #polytechnic
EXPERIMENT ON JOHNSON COUNTER #LCD LAB#btech #polytechnic
Просмотров 6 тыс.11 месяцев назад
EXPERIMENT ON JOHNSON COUNTER #LCD LAB#btech #polytechnic
EXPERIMENT ON ASYNCHRONOUS 3 BIT UP/DOWN COUNTER#btech #lab #polytechnic
Просмотров 9 тыс.11 месяцев назад
EXPERIMENT ON ASYNCHRONOUS 3 BIT UP/DOWN COUNTER#btech #lab #polytechnic
Ring counter#verilog#xilinx#lcd lab
Просмотров 3,9 тыс.11 месяцев назад
Ring counter#verilog#xilinx#lcd lab
LAB EXPERIMENT ON 4:1 MULTIPLEXER USING GATES
Просмотров 10 тыс.11 месяцев назад
LAB EXPERIMENT ON 4:1 MULTIPLEXER USING GATES
D FLIP FLOPS IN XILINXS #VERILOG #lcd #experiment#btech #polytechnic
Просмотров 1,2 тыс.Год назад
D FLIP FLOPS IN XILINXS #VERILOG #lcd #experiment#btech #polytechnic
EXPERIMENT ON SYNCHRONOUS MOD 5 UP COUNTER# LCD LAB
Просмотров 10 тыс.Год назад
EXPERIMENT ON SYNCHRONOUS MOD 5 UP COUNTER# LCD LAB
EXPERIMENT ON SR FLIP FLOP #LOGIC CIRCUIT DESIGN LAB
Просмотров 6 тыс.Год назад
EXPERIMENT ON SR FLIP FLOP #LOGIC CIRCUIT DESIGN LAB
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Thanks
Welcome🥰
👍
Thanku miss🫶🎉😊
Welcome 🥰
😊❤🎉
❤
Good explanation ma'am.. Really helpful for my exams☺️❤️
Glad to hear that
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❤🎉😊
😊❤
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ruclips.net/p/PL8n75pCdznHUpnoDp1ohumv8lh1WUFpxi&si=M4DVBOpPtflmmd-k
Very good
❤
Mam Ella experiment s um cheyooo please
Almost ella experiments cheythitund. Pls go through the channel
Mam exm nn specific ayii data,gate angane chokio ato nmkk ariyna etelum oru model program ezutiya matiyooo
Specify cheyth chodhikkunnenkil mathram ezhuthiyal mathy. Illenkil ariyunna modelling l ezhutham
@btechlabs ok
Good explanation ma'am😊 In which college are you teaching?
UKF COLLEGE OF ENGINEERING &TECHNOLOGY, PARIPPALLI, KOLLAM 🥰
Madam it was so hard to understand... through this video class I got the courage to attend my exam without any fear❤❤🥺thank you so much ma'am ❤❤❤❤❤🙏🙏
thank you so much
5 bit addition anenkil oru 7483 kudi vachal mathiyo
Ys
16 bit and 8 bit substraction langauge are same or not
Same. For 16 bitbsubtraction first subtract the lsb of the numbers, then msb
Thank u
Welcome
Already 36 videos of the same lab have been uploaded. Please go through ruclips.net/p/PL8n75pCdznHXwseVy4yf8UHcoh1ZeFDCm&si=sSuo7FKdPaW8lsTY
Thank you miss . Can u upload other flip flops too ? Can u upload all other experiments before the University lab exam ?
Thank you ma'am. Understanding everything very well . Can u upload other experiments too ? It would be really helpful 🙏
Yes I will
A few more experiments have already been posted. Please go through the playlist of ' Btech labs'
Thanks mam
Welcome🥰
So what is T.T for input seq.of outputs ,when JK seq. is 00 ,10,11,01 00..and repeat..?
J k qn+1 0 0 previous op 1 0 1 1 1 0 (cmplmnt prvs ) 0 1 0 0 0 0 (prvs op) 1 0 1
@@btechlabs thank you for your prompt reply
@@analoghardwaretops3976😊
Thank you teacher❤❤
You're welcome 😊
@@btechlabs❤❤😊
Very use full mam. Thankyou
👍
Thank u🥰
Cls ellam nannai manasilakunnund missee😊
Thank u🥰
Thanku miss❤
Welcome dear🥰
Miss super class
Thank u🥰
Super super ❤🫶
❤
Thank u🥰
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Thank u🥰
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Thank u
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Thank u🥰
Miss scene thanneee 🥹🫶
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Inn enikke lab exam aayirunnu 8421 (ring counter) counter implement cheyyana paranje missinte videos Karanam 2 divasam mumbe enikke ottum ariyattate njan inne nannayitte cheythu output kitti thank u ma'am ❤️❤️
Happy to hear❤️
good class..
Thank you😊
Dont give these kind of questions for exam.almost studnets appearing exam have no idea of what is its basic principle😢.and cause confusuion
What is the relation between this comment and this video😁???
@@btechlabs i am sharing my experince during engineering collage.just wanted to say this to all the tutors🤣
@@anandu1998😃
Thank you teacheree ee same question choichu innathe lab exam ine. Ee video kanditt poyakond jaichu❤️🙏
Happy to hear🥰🥰
thengs
☺️
Thank you teacher
Welcome!!
Maam nale exam.ahn pls replyy
ruclips.net/video/FIg3DnjsLnY/видео.htmlsi=8Y90DdcfWQTtxWzD
Substracter ooh???
Which subtractor??